A conventional image sensor is composed of an array of individual light sensitive circuits called pixels that are organized in rows and columns. A row of pixels has a common line connecting the control gates of their respective access transistors. Data is passed from a pixel through its access transistor to a data line. Each column of pixels is connected to a common data line.
There are a number of different types of semiconductor-based imagers including charge coupled devices (CCD), photodiode arrays, and complementary metal-oxide semiconductor (CMOS) imagers. A CMOS imager circuit, for example, includes a focal plane array of pixel cells; each cell includes a photosensor, for example, a photogate, photoconductor or a photodiode overlying a substrate for producing a photo-generated charge in a doped region of the substrate. A readout circuit is provided for each pixel cell and includes at least a source follower transistor and a row select transistor for coupling the source follower transistor to a column output line. The pixel cell also typically has a floating diffusion node, connected to the gate of the source follower transistor. Charge generated by the photosensor is sent to the floating diffusion node. The imager may also include a transistor for transferring charge from the photosensor to the floating diffusion node and another transistor for resetting the floating diffusion node to a predetermined charge level prior to charge transference.
In a CMOS imager pixel cell, for example, a four transistor (4T) pixel, all the active elements of a pixel cell perform the necessary functions of (1) photon to charge conversion; (2) transfer of charge to the floating diffusion node; (3) resetting the floating diffusion node to a known state before the transfer of charge to it; (4) selection of a pixel cell for readout; and (5) output and amplification of a signal representing a reset voltage and a pixel signal voltage based on the photo converted charges. A three transistor (3T) pixel circuit operates similarly, but omits a transfer transistor for transferring charge from the photosensor to the floating diffusion region and couples the floating diffusion region and photosensor together.
CMOS imagers are generally known and are discussed, for example, in Nixon et al., “256×256 CMOS Active Pixel Sensor Camera-on-a-Chip,” IEEE Journal of Solid-State Circuits, Vol. 31(12) pp. 2046–2050, 1996; Mendis et al, “CMOS Active Pixel Image Sensors,” IEEE Transactions on Electron Devices, Vol. 41(3) pp. 452–453, 1994 as well as U.S. Pat. Nos. 5,708,263 and 5,471,515, all of which are herein incorporated by reference.
FIG. 1 illustrates a block diagram of a conventional CMOS imager device 908 having an array 200 of pixel cells, which may be 3 transistor, 4 transistor or pixels using other numbers of transistors. Pixel cell array 200 comprises a plurality of pixel cells arranged in a predetermined number of columns and rows. The pixel cells of each row in array 200 are all turned on at the same time by a row select line, and the pixel cells of each column are selectively output by respective column select lines. The row lines are selectively activated by the row driver 210 in response to row address decoder 220 and the column select lines are selectively activated by the column driver 260 in response to column address decoder 270. The CMOS imager is operated by the control circuit 250 that controls address decoders 220, 270 for selecting the appropriate row and column lines for pixel operation and readout, and row and column driver circuitry 210, 260 that apply driving voltage to the drive transistors of the selected row and column lines. The pixel column signals, which typically each include a pixel reset signal Vrst and a pixel image signal Vsig, for a pixel cell selectively connected to a column line are read by a sample and hold circuit 265 associated with the column driver 260 and are subtracted by amplifier 267 to form a differential signal Vrst−Vsig for each pixel cell which is amplified and then digitized by analog to digital converter 275. The analog to digital converter 275 converts the received analog pixel signals to digital signals, which are fed to an image processor 280 to form a digital image.
The operation of the charge collection of the CMOS imager is known in the art and is described in several publications such as Mendis et al., “Progress in CMOS Active Pixel Image Sensors,” SPIE Vol.2172, pp. 19–29 1994; Mendis et al., “CMOS Active Pixel Image Sensors for Highly Integrated Imaging Systems,” IEEE Journal of Solid State Circuits, Vol. 32(2), 1997; and Eric R, Fossum, “CMOS Image Sensors: Electronic Camera on a Chip,” IEDM Vol. 95 pages 17–25 (1995) as well as other publications. These references are incorporated herein by reference.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630 to Rhodes, U.S. Pat. No. 6,376,868 to Rhodes, U.S. Pat. No. 6,310,366 to Rhodes et al., U.S. Pat. No. 6,326,652 to Rhodes, U.S. Pat. No. 6,204,524 to Rhodes, and U.S. Pat. No. 6,333,205 to Rhodes. The disclosures of each of the forgoing are hereby incorporated by reference herein in their entirety.
Image sensor pixel arrays, such as the CMOS imager described above, are subject to various failing mechanisms, which ultimately result in a defective imagers. For example, pixel arrays can be short circuited or open circuited during fabrication and therefore may not perform their proper function. In order to overcome these problems and select arrays that are acceptable for use, defects in the array must be detected.
Image sensor arrays, such as the CMOS imager described above, have traditionally been tested using a calibrated, static light source. Typically, during production testing, an image sensor would be exposed to light of varying intensity ranging from black to white. Measurements are taken to determine the response of the array. The accuracy of this method of testing image sensors, however, is a concern. For example, if two neighboring pixels were shorted together during the manufacturing process, the measured output would be the same as if the pixels were not shorted together. This occurs because both pixels have been exposed to the same intensity of light during the test. The defect may go undetected until the device is placed in a system and tested under “real world” conditions.
Defect detection is especially difficult when it is dependent on human observation of the output as displayed on the viewing device (e.g. a cathode ray tube or liquid crystal display panel). For example, when photons strike an image sensor, such as the CMOS imager described above, the photosensitive region of the sensor converts the photons into current that is subsequently converted via a digital to analog converter into a 10 bit word for viewing by an observer. As the number of pixels on an integrated circuit expands, it becomes increasingly difficult for a human to detect faults. Special training is required for the human observers; and even then, human interpretation plays a major role in the determination of acceptable products. Unfortunately, humans lack consistent observational skills due to their very nature and varying levels of alertness throughout the day. Therefore, this type of testing is not acceptable for high volume, cost sensitive, image sensor products.
Other image sensor testing techniques have problems as well. For example, when image sensors are tested using static test images, care must be taken to align adjacent light and dark potions of the test images with adjacent rows or columns of pixels. This alignment process can be difficult and time consuming. Furthermore, static test images are not capable of testing an image sensor for various failing mechanisms across the entire pixel array.
Therefore, there is a need and desire for an automated apparatus and method of efficiently testing an entire array of image sensors that overcomes the shortcomings of conventional testing techniques.